AI Agent Designs RISC-V CPU in 12 Hours

Overview

A breakthrough in autonomous hardware engineering has emerged from Verkor, a French AI chip design startup. In a research paper published in March, the company revealed that its agentic AI system, Design Conductor, successfully designed a complete RISC-V CPU core from scratch. The entire process, spanning from initial requirements to a verified, layout-ready design file, took just 12 hours.

This achievement stands in stark contrast to traditional semiconductor workflows, which typically require 18 to 36 months and involve teams of hundreds of engineers. The project demonstrates that autonomous agents can now navigate the complex constraints of digital logic design, marking a significant milestone in the intersection of artificial intelligence and hardware engineering.

The Design Process and Architecture

The genesis of the VerCore processor began with a modest 219-word requirements document. Design Conductor autonomously interpreted these specifications and generated a five-stage pipelined, in-order, single-issue RISC-V core. This architecture includes instruction fetch, decode, execute, memory access, and writeback stages, featuring early branch resolution and operand forwarding to optimize performance.

"This is the first time an autonomous agent has built a working CPU from spec to GDSII layout file," Verkor stated regarding the significance of the achievement.

During the design phase, the AI system exercised independent judgment on optimization strategies. It implemented a fast Booth-Wallace multiplier, which allowed the processor to clock at 2.57 GHz in specific configurations. Additionally, the agent evaluated both one-cycle and two-cycle branch penalty designs, ultimately selecting the one-cycle variant after rigorous testing.

The resulting processor was synthesized using the ASAP7 7nm process design kit, an academic open-source PDK rather than a commercial production node. Despite being a simplified design compared to leading-edge commercial chips, VerCore achieved a CoreMark score of 3,261. For context, Verkor compares this performance to Intel’s Celeron SU2300, a mobile processor based on the Penryn architecture released in 2011.

Performance and Simulation Verification

While the 12-hour timeline is impressive, it is crucial to contextualize the complexity of the design. The VerCore is a relatively straightforward processor by modern industry standards. It lacks advanced features such as out-of-order execution and cache hierarchies, which are staples of contemporary high-performance CPUs.

Commercial processors today often cost over $400 million to develop and require extensive manual verification. Verkor acknowledges that their system consumed "many tens of billions of tokens" during this comparatively simpler design task. However, the ability to generate a functional, timing-verified design autonomously, even at this basic level, represents a functional proof-of-concept for AI-driven EDA (Electronic Design Automation).

The design has not yet been physically fabricated. Instead, Verkor verified its functionality through simulation using Spike, a reference RISC-V ISA simulator. The team also reported that they can run a variant of uCLinux within the simulation environment, confirming that the processor can handle real-world operating system workloads.

Limitations and Future Implications

Verkor’s research paper is candid about the current limitations of the underlying large language models (LLMs). The agent occasionally "underestimates the complexity of work required" to address certain design issues. In one notable instance, when the design failed to meet timing constraints, Design Conductor attempted major circuit modifications rather than more targeted optimizations, highlighting a lack of deep engineering intuition.

Despite these hurdles, the implications for the semiconductor industry are profound. If AI agents can automate the most tedious aspects of RTL (Register Transfer Level) coding and verification, the barrier to entry for chip design could lower significantly. This could enable rapid prototyping of specialized processors for niche applications, reducing the time-to-market for custom silicon.

The technology also raises questions about the future role of human engineers. Rather than performing low-level circuit design, engineers may transition to roles focused on high-level specification, AI oversight, and complex verification strategy. The 12-hour design cycle suggests a future where hardware iteration happens at software speeds, potentially accelerating innovation in computer architecture.

As the technology matures, experts anticipate that autonomous agents will tackle increasingly complex designs. The next logical steps involve integrating cache coherence protocols, out-of-order execution units, and support for multi-threading. Until then, VerCore stands as a testament to how far AI has come in specialized technical domains, bridging the gap between software generation and physical hardware implementation.