SK hynix unveils memory roadmap to slash AI bottlenecks

Overview

SK hynix has unveiled a comprehensive next-generation memory roadmap designed to address the escalating bottlenecks in artificial intelligence infrastructure. As demand for AI inference surges across industries, the South Korean semiconductor giant is accelerating the development of advanced technologies to support this exponential growth. The company plans to strengthen its leadership in high-bandwidth memory (HBM) while simultaneously introducing new tiers of storage and memory solutions.

The roadmap, presented at SEDEX 2026, highlights a strategic shift toward optimizing the entire memory hierarchy rather than focusing solely on individual product improvements. Key initiatives include the advancement of 3D Stacked DRAM and the introduction of High Bandwidth Flash (HBF). These technologies aim to significantly improve system performance and energy efficiency as AI models process increasingly complex tasks and larger volumes of data.

Strategic Vision for the AI Era

Ahn Hyun, Chief Development Officer of SK hynix, outlined the company’s technology strategy during a keynote address at South Korea’s largest semiconductor exhibition on Oct. 14. Under the theme “The Evolution of Memory Technology in the AI Era,” Ahn emphasized that the traditional concept of the “memory wall” is evolving. In modern AI systems, the performance gap between processors and memory, along with the energy costs associated with data movement, has become a critical constraint.

The company identifies three reinforcing dimensions driving the expansion of AI inference demand: task complexity, context length, and inference request volume. These factors are creating a sharp increase in the need for AI computing infrastructure. SK hynix estimates that the scale of AI infrastructure performance requirements could grow approximately 20-fold by 2030 compared with 2026 levels.

The challenge is no longer just about raw processing speed; it is about managing how data moves between different memory layers efficiently and with minimal energy loss.

To address these challenges, SK hynix is moving toward an integrated memory architecture. This approach seeks to connect different memory tiers more efficiently, ensuring that data can flow smoothly from high-speed caches to high-capacity storage. By optimizing the hierarchy, the company aims to reduce latency and power consumption that currently hinder large-scale AI operations.

Innovations in Memory Hierarchy

SK hynix is pursuing a multi-faceted approach to memory innovation, focusing on three core areas: advanced HBM, 3D Stacked DRAM, and the novel HBF technology. Each component plays a distinct role in addressing the specific bottlenecks identified in modern AI workloads.

The company will continue to advance its HBM technology, improving capacity, bandwidth, and energy efficiency across generations from HBM1 to HBM4E. Beyond standard offerings, SK hynix is expanding its focus to custom HBM. This variant incorporates memory controllers and customer-specific logic directly into the base die, allowing it to better match the unique requirements of individual AI systems.

In addition to HBM, SK hynix is developing 3D Stacked DRAM. This technology involves vertically stacking DRAM on top of logic chips such as graphics processing units (GPUs) and neural processing units (NPUs). By reducing the physical distance between computing components and memory, 3D Stacked DRAM aims to deliver data more quickly while improving overall performance and energy efficiency.

For the growing capacity demands of AI inference, the company introduced High Bandwidth Flash (HBF). HBF applies through-silicon via (TSV) stacking and high-speed input/output technologies, originally developed for HBM, to NAND flash memory. Positioned as a new tier between HBM and traditional DRAM, HBF is designed to combine high bandwidth with substantially greater storage capacity.

The company is targeting bandwidth at approximately half that of HBM of the same generation while providing around 10 times the capacity. This positioning allows HBF to serve as a highly efficient buffer, potentially reducing reliance on slower DRAM and SSD access. Ahn noted that NAND-based HBF is particularly suitable for AI inference workloads, which frequently involve repeated data reads with relatively few write operations.

Product Portfolio and Ecosystem Development

Beyond core technology development, SK hynix is diversifying its memory and storage architectures through technologies such as Compute Express Link (CXL) and Storage-Next. These innovations are designed to accommodate different AI workloads and further optimize data flow within server environments. The company plans to pursue early standardization of HBF and strengthen collaboration with global partners to establish a broader ecosystem for the technology.

At SEDEX 2026, SK hynix showcased its broad portfolio under the theme “An Unstoppable AI Journey.” The exhibition featured a dedicated running track design that guided visitors through the company’s latest technologies and products. Featured server memory products include the 256GB 3DS RDIMM for high-capacity AI workloads, the 128GB MRDIMM for high bandwidth, and the 64GB RDIMM utilizing sixth-generation 10-nanometer-class process technology.

Enterprise storage solutions on display included the PEB210 series SSDs, which support direct liquid cooling, and the PS1101 E3.S, the company’s first SSD developed using quad-level cell technology. For personal computing and mobile applications, the lineup includes DDR5 CSODIMM, GDDR7, LPDDR5X, and LPDDR6 memory products, alongside PC SSDs and mobile NAND solutions such as UFS 4.1 and UFS 5.0.

The exhibition also highlighted the strong partnership between SK hynix and NVIDIA. An HBM wafer bearing NVIDIA CEO Jensen Huang's signature was displayed alongside models illustrating HBM and HBF architectures. This presence underscored the company’s commitment to integrating its memory solutions with leading AI chipmakers. Through this roadmap and exhibition, SK hynix aims to extend its expertise beyond HBM alone, developing a more integrated memory ecosystem capable of meeting the insatiable data processing demands of the future AI era.